General Description: This solution is for a specific set of conditions. If your design is causing a core dump or application error and you do not meet all 4 of the conditions please contact the Hotline.
1- Design contains a ILFFX, ILFFXI, or a ILFLX, where the clock and the gate are driven with different clocks.
2- Design must not contain timing constraints.
3- Must be running TRCE in Verbose Mode. This is -v on the command line.
4- Must be running TRCE in Advanced Mode. This is -a on the command line.
The workaround is to add disable = "Toksek" to the pcf file before running TRCE.
SCHEMATIC START ;
disable = "Toksek";
SCHEMATIC END ;