General Description: In a design that contains CORE Generator components, you must create a Foundation Schematic Symbol in the CORE Generator GUI to be able to run Functional Simulation from within Foundation. This includes VHDL or Verilog designs.
The Foundation simulation model is created when you choose the Foundation Schematic Symbol option in CORE Generator. Even though this file is not required to be able to implement the design, it is required if you wish to perform Functional Simulation in Foundation BEFORE the design is implemented with the Implementation Tools.
In the CORE Generator Options dialog, be sure that the "Foundation Schematic Symbol" output format is selected.