With Trim_Empty_Roms = TRUE (Trim unused ROMs), the resulting outputs appear to be bit-shifted.
With Trim_Empty_Roms = false (no trimming of unused ROMs), the resulting outputs maintain full precision as expected.
Note that in the example, the 1st and 5th coefficients of the filter (specified on the line beginning with the keyword, "coefdata") are both zero.
ソリューション
What's happening here is that the PDA FIR core calculates the required full precision output width differently, depending on whether Trim_Empty_Roms is enabled or not.
Maximum output width is calculated with knowledge of how Xilinx implements the FIR filter. This involves the use of lookup tables of pre-calculated partial products and sums of partial products, in conjunction with adder trees which add up various combinations of the partial product sums, two at a time.
The result potentially grows one bit for each adder in the tree when you allow for an addition overflow for each summation operation.
For a given number of coefficients N, the number of sign extension bits added to the FIR output is equal to the base 2 logarithm of N--for example, LOG2(8) = 3 sign extension bits for N=8.
For Trim_Empty_Roms = FALSE; the PDA FIR module assumes that each coefficient potentially can take on the maximum magnitude that can be represented by the specified number of bits. Based on this assumption, it calculates the maximum output width as 24 bits. The MSB's represent sign extension bits when signed input is specified.
For Trim_Empty_Roms = true; the PDA FIR module bases its calculation on the actual coefficient values specified in the COE file. When coefficients are zero or very close to zero, there is no overflow when two partial products involving these coefficients are added together. At those stages where the near-zero coefficients multiply the data and are added to another partial product, the intermediate result does not grow. In the example, you end up with a smaller maximum output width of 22 bits.
When Trim_Empty_Roms = TRUE, there are fewer sign extension bits in the final result. To the user, it appears that the output has been shifted to the left by some number of bits.
To be safe, users should set Trim_Empty_Roms to FALSE to keep the full resolution of the intermediate results, then ignore the extra sign bits as desired if there is any possibility that they may wish to change the values of the coefficients at some future date without changing the size of the core. If the size of the core does not change, the layout and timing of the placed and routed circuit will also remain the same. Under these conditions, to account for the possibility that any new coefficients could potentially equal the maximum magnitude value, you need to preserve the full precision output width.
NOTE: Because of this behavior, users should always set "Trim_Empty_Roms = FALSE" when cascading filters, so that all the cascaded filters have the same output width, and none will appear to be bitshifted with respect to the others.
NOTE: Please refer to (Xilinx Solution #4427) for information on how the output bit width is calculated.