AR# 44529: MIG 7 Series v1.3 DDR3 - Incorrect MAP Parameters when CKE and ODT Are Allocated to a Byte Group Separate from the Remaining Address/Control Signals (ERROR:Route:471)
"ERROR:Route:471 - This design is unrouteable. Router will not continue. To evaluate the problem please use fpga_editor. The nets listed below can not be routed: Unrouteable Net:u_mig_7series_v1_3/u_memc_ui_top_std/mem_intfc0/ddr_phy_top0/u_ddr_mc_phy_wrapper/u_ddr_mc_phy/ddr_phy_4lanes_0.ddr_phy_4lanes/phy_encalib<1> Unrouteable Net:u_mig_7series_v1_3/u_memc_ui_top_std/mem_intfc0/ddr_phy_top0/u_ddr_mc_phy_wrapper/u_ddr_mc_phy/ddr_phy_4lanes_0.ddr_phy_4lanes/phy_encalib<0> Unrouteable Net:u_mig_7series_v1_3/u_memc_ui_top_std/mem_intfc0/ddr_phy_top0/u_ddr_mc_phy_wrapper/u_ddr_mc_phy/ddr_phy_4lanes_0.ddr_phy_4lanes/ddr_byte_lane_B.ddr_byte_lane_B/po_rd_enable Unrouteable Net:u_mig_7series_v1_3/u_memc_ui_top_std/mem_intfc0/ddr_phy_top0/u_ddr_mc_phy_wrapper/u_ddr_mc_phy/ddr_phy_4lanes_0.ddr_phy_4lanes/phaser_ctl_bus<1>"