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AR# 472

Differences between the 7318/7336 and 7354/7372/73108/73144


Engineers designing for the XC7300 family of EPLDs should be aware of the
following architechtural differences between members of this family:

XC7318/36/144 vs. XC7354/72/108 Fast Function Blocks
XC7318/36/144 XC7354/72/108
Output polarity control Fixed output polarity
Direct support for D- or T-flip-flop D-flip-flop only
Flip-flop asynchronous set or reset Flip-flop asynchronous set only

XC7318/36 vs. XC7354/72/108/144 I/O Blocks
XC7318/36 XC7354/72/108/144
Direct input only Direct, latched, or registered input
No input polarity control Input polarity control

Also note that, because the XC7318 and XC7336 contain only Fast Function
Blocks, all flip-flop clock signals must be on the FCLK nets, and all
output enable signals must be on the global FOE nets.


AR# 472
日付 01/15/2003
ステータス アーカイブ
種類 一般