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  3. AR# 4752: M1.5:Trce: Does not produce the custom delay information from input pad through asynchronous CLR/PRE to output of a Flip flop.

AR# 4752

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M1.5:Trce: Does not produce the custom delay information from input pad through asynchronous CLR/PRE to output of a Flip flop.

説明

Keyword: asynchronous delay, trce, CLR, PRE

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General Description: Custom filters in the path filters does not report the timing

from pad to output of flip flop in 9500 family if the path goes through asynchronous

CLR and PRE.

ソリューション

This issue will be addressed in the next software release.

AR# 4752
日付 01/18/2010
ステータス アーカイブ
種類 一般
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