AR# 47665: LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v11.3 (ISE 14.1) - Timing errors might be seen with example design if targeting a Spartan-6 device
"Timing constraint: ts_tx_clk = PERIOD TIMEGRP "tx_logic" 8 ns HIGH 50%; For more information, see Period Analysis in the Timing Closure User Guide (UG612).
3809 paths analyzed, 1863 endpoints analyzed, 49 failing endpoints 49 timing errors detected. (49 setup errors, 0 hold errors, 0 component switching limit errors) Minimum period is 10.057ns."