AR# 4901: A1.5/F1.5 - Synopsys design has multiple loads on net with some loads are not getting driven.
AR# 4901
A1.5/F1.5 - Synopsys design has multiple loads on net with some loads are not getting driven.
説明
A design from FPGA Compiler version 1997.08 is creating an sxnf with several buses where some of the driver are not getting connected to the loads. There are 54 x4kma:111 WARNINGs (FMAPs being removed) and 54 x4kma:340 WARNINGs (signals being removed) in the cubi_top.mrp report.