phy_mc_cmd_full_r <= #TCQ 1'b0;

end else begin

phy_mc_ctl_full_r <= #TCQ phy_mc_ctl_full;

phy_mc_cmd_full_r <= #TCQ phy_mc_cmd_full;

end

// register output data pre-fifo almost full condition and fold in WR status

reg ofs_rdy_r = 1'b0;

always @(posedge clk)

if(rst)

ofs_rdy_r <= #TCQ 1'b0;

else

ofs_rdy_r <= #TCQ ~phy_mc_cmd_full_r && ~phy_mc_ctl_full_r && ~(phy_mc_data_full && ~rd_wr_r);

// Disable priority feature for one state after a config to insure

// forward progress on the just installed io config.

reg override_demand_r;

wire override_demand_ns = rnk_config_strobe || rnk_config_kill_rts_col;

always @(posedge clk) override_demand_r <= override_demand_ns;

output wire rts_col

assign rts_col = ~sending_col && (demand_ok || override_demand_r) &&

col_cmd_rts && ofs_rdy_r;

改訂履歴
2012/07/25 - 初版