// Instantiating PULLDOWN resistor // Pulldowns can only be used in IOBs // output TRI_SIG;
PULLDOWN U1 (.O(TRI_SIG));
// Instantiating PULLUP resistor // Pullups can be used in IOBs or with // Tri-state components (BUFT or BUFE) or // Open-Drain components (DECODE, WAND, WORAND) // wire TRI_SIG;
PULLUP U1 (.O(TRI_SIG));
3
FPGA デザインに VHDL を使用する場合、次のインスタンシエーション文を使用してください。
-- Instantiating PULLDOWN resistor -- Pulldowns can only be used in IOBs -- TRI_SIG: std_logic;
component PULLDOWN port (O: out std_logic); end component;
-- Instantiating PULLUP resistor -- Pullups can be used in IOBs or with -- Tri-state components (BUFT or BUFE) or -- Open-Drain components (DECODE, WAND, WORAND) -- TRI_SIG: std_logic;
component PULLUP port (O: out std_logic); end component;