We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 54398

Zynq-7000 AP SOC - When using a faster DDR device than the clock frequency, which timing specifications can be used?


When using a faster speed grade DDR device with a slower clock for PS DDRC, which specification should I use? The faster or slower one?


If the DDR device mentions it is back compatible with theslower speed grade, the specifications of both speed grades are available to be used. To achieve maximum bandwidth, EDK XPS selectsthe better setting to generate ps7_init for inclusion into the FSBL. For more information on proper settings, contact the device vendor, and override with a custom setting in the Xilinx tools.
AR# 54398
日付 02/25/2013
ステータス アクティブ
タイプ 一般
  • Zynq-7000