I attached the net attribute TNM_NET on the net beetween the clock IPAD (port) and the BUFGP (Clock buffer) in my Mentor schematic. After running pld_men2edif, so that I can process my design through the Xilinx Design Manager, I receive the following warning in NGDBuild:
WARNING:basnu:159 - Attribute "TNM_NET" on "CLK" is on the wrong
type of object. Please see the "Attributes, Constraints, and
Carry Logic" section of the Libraries Guide for more
information on this attribute.
What is the warning? What do I do about it?
When the Mentor program ENWrite runs, this TNM_NET property/attribute automatically will be written into the EDIF netlist attached to two points:
1. The port reference in the EDIF, which is the external signal listing. This is the IPAD pin in the schematic.
2. The Net in the EDIF. This is the net that the attribute was attached to in the schematic.
This warning can safely be ignored, although it is true, since the TNM_NET attribute that is attached to the NET still exists and is legal. You can use the TNM_NET property/attribute as you normally would.
NOTE: There is currently no way to prevent this behavior with ENWrite.