AR# 5785: M1.5i EPIC - A core dump/segmentation fault occurs when adding a pin to a block
M1.5i EPIC - A core dump/segmentation fault occurs when adding a pin to a block
Keywords: EPIC, core dump, segmentation fault, add a pin, crash
General Description: EPIC 1.5.25, 4044xla, Solaris 2.6 core dumps when I try to add a pin to a block.
EPIC crashes after the following procedure:
1. Open the design in read/write mode. (chip.ncd & chip.pcf) (EPIC:M1.5.25)
2. Select the signal naack_oe_out in list to identify area for change.
3. Go to clb_r2_c21 (nts106_out). EDITBLOCK
4. Select C3 as the input for FFX.
5. Select positive clock for FFX. Select the ouput of FFX.
6. Set FFX as FF with set. Click "OK".
7. Select the XQ pin at lower right of clb_r2_c21.
8. Click the "Add" button.
9. After a few minutes, a "segmentation fault" or "bus error" is reported.
NOTE: I also tried auto-routing this pin without adding it first. This also led to a crash.
This problem is fixed in the next software release (2.1).
Work-around: 1. Turn off auto routing in EPIC's main attribute window.
2. Make configuration changes to the component nts106_out (or the particular component).
3. Modify external connectivity changes (I connected D and XQ pins to IOBs).
4. Save and close EPIC before trying to route the resulting nets.
If there are still problems, try "unbinding the macro" in EPIC. Select "Macro" from the list window, then Edit => Unbind.
The problem is that the component was changed to a superbel. When components are superbel'd, the list of POBJs is not updated. Hence, when you traverse this list, it is likely that you will get corrupt data, since entries may no longer be valid.
Another work-around would be to not do any timing analysis in EPIC after making a superbel without reworking the constraints.