AR# 6198


M1.5i/2.1i: How to utilize the Virtex secondary global clock routing


Urgency: HOT

General Description:

Virtex devices have 24 secondary global clock routing

resources in addition to 4 global clock buffers. How does one utilize these?


In M1.5i software release the Place and Router determines

the usage of these global clock routing resources.

In the current M2.1i software release the user will be able to use the

MAXSKEW constraint to tag nets to use the secondary global

routing resources in Virtex.

When a net with this MAXSKEW constraint is seen. PAR will place

the IOB that generates the signal on the top or bottom edge and the

route the signal using the secondary global clock routing.

The global clock buffers are used with BUFG components in the

design. The Global Clock Buffers only go to clocks in the Virtex

Device and not anywhere else.

An example:

NET any_net_name MAXSKEW = 7 ;

AR# 6198
日付 01/18/2010
ステータス アーカイブ
種類 一般
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