AR# 632: PROsim, ViewSim: Using the LOADM command with Xilinx FPGA simulations
PROsim, ViewSim: Using the LOADM command with Xilinx FPGA simulations
There is often confusion about use of the LOADM command for Viewlogic simulation. Here is a clarification of the command found in the Viewlogic documentation. The LOADM command specifies the value of the output of a RAM/ROM componant at the specified address(es).
Here is example 1 from the viewlogic documentation:
loadm videobuf (0:255) AA\h
This command loads the 8 bit wide RAM or ROM with the hex output AA for every location between 0 and 255. For the XC4000 simulations all memories are 1 bit wide. For XC4000 designs even multiple bit width outputs are generated as macros of single output memories. These means that all memories will be made from either 16x1 or 32x1 memory componants, so the output that is defined should always be one bit wide. All 16 bit memories will take as many as 16 loadm commands to initialize, and all 32 bit memories will take as many as 32 loadm commands to initialize. (this can only be reduced if and only if there are adjacent locations with the same output)
For example take a 16x1 ROM that has an INIT=AAAA attribute. (this sets up every adjacent bit in the ROM as opposites.) The way to initialize this ROM in viewlogic simulation would be:
An example where only one loadm command is needed is a ROM where all of the outputs are the same. (INIT=FFFF or INIT=0) The viewlogic command for the case where all values of a 16x1 rom are set to 1 would be:
loadm videobuf/rom (0:15) 1
When people generate their ROMs using memgen or XBLOX a .XMM file is created which will initialize the memories. However, when a discrete memory is added to a schematic it is expected that the user be able to use the loadm command to initialize their simulation.