This answer record contains the Release Notes and Known Issues for the SMPTE UHD-SDI Receiver (RX) Subsystem and includes the following:
SMPTE UHD-SDI RX Subsystem Page:
https://www.xilinx.com/products/intellectual-property/uhd-serial-digital-interface.html
General Information:
Supported Devices can be found in the following three locations:
Version Table:
This table correlates the core version to the first Vivado design tools release version in which it was included.
| Core Version | Vivado Tools Version | Subsystem Changelog | Subsystem Patches | Standalone Software Driver Patches |
|---|---|---|---|---|
| v2.0 (Rev. 3) | 2019.1 | (Xilinx Answer 72242) | (Xilinx Answer 72506) | |
| v2.0 (Rev. 2) | 2018.3 | (Xilinx Answer 71806) | ||
| v2.0 (Rev. 1) | 2018.2 | (Xilinx Answer 71212) | (Xilinx Answer 71264) | |
| v2.0 | 2018.1 | (Xilinx Answer 70699) | (Xilinx Answer 71179) | |
| v1.0 (Rev. 1) | 2017.4 | (Xilinx Answer 70386) | (Xilinx Answer 70593) | |
| v1.0 | 2017.3 | (Xilinx Answer 69903) |
General Guidance:
The table below provides Answer Records for general guidance when using the SMPTE UHD-SDI RX Subsystem.
| Article Number | Article Title |
|---|---|
| (Xilinx Answer 72449) | UltraScale+ GTH/GTY - Why do I see link errors on the TX when using QPLL0 and QPLL1 to switch line rates on the RX between 11.88 Gbps and 11.88/1.001 Gbps? |
| (Xilinx Answer 62645) | Can non-standard resolutions be supported? |
| (Xilinx Answer 70693) | Why is the rx_mode always at 3'b101 for 12G-SDI, even when the fractional line rate is received when targeting UltraScale or UltraScale+ devices? |
Known and Resolved Issues:
The following table provides known issues for SMPTE UHD-SDI RX Subsystem, starting with v1.0, initially released in Vivado 2017.3.
Note: The "Version Found" column lists the version the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
| Article Number | Article Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 72505) | Why is there a missing line every 2 frames when receiving 3G-SDI(1080p60) Level B with an SMPTE UHD-SDI RX subsystem? | v2.0 (Rev. 3) | N/A |
| (Xilinx Answer 71177) | Why do I fail to detect and transmit SD-SDI Interlace resolutions? | v2.0 | v2.0 (Rev. 3) |
| (Xilinx Answer 70586) | Why is the ST352 valid bit toggling for 1080i59.94 when using the Blackmagic Designs ATEM 4k for the SDI Source? | v1.0 (Rev. 1) | v2.0 |
| (Xilinx Answer 70063) | Why can I not generate the SMPTE UHD-SDI RX Subsystem Example Design? | v1.0 | v2.0 |
| Revision History: | |
|---|---|
| 07/04/2019 | Added (Xilinx Answer 72506) to version table and (Xilinx Answer 72505) to the known issues table |
| 06/25/2019 | Added (Xilinx Answer 72449) |
| 05/15/2019 | Added v2.0 (Rev. 1), v2.0 (Rev. 2) and v2.0 (Rev. 3) to Version Table |
| 05/30/2018 | Added (Xilinx Answer 71177) |
| 05/01/2018 | Added (Xilinx Answer 62645) |
| 04/04/2018 | Added v2.0 to Version Table and (Xilinx Answer 70693) |
| 02/26/2018 | Added (Xilinx Answer 70586) |
| 12/20/2017 | Added v1.0 (Rev. 1) to Version Table |
| 10/27/2017 | Added (Xilinx Answer 70063) |
| 10/09/2017 | Initial Release |
| Answer Number | アンサータイトル | 問題の発生したバージョン | 修正バージョン |
|---|---|---|---|
| 56852 | ザイリンクス マルチメディア、ビデオ、および画像ソリューション センター - 主な問題 | N/A | N/A |
| Answer Number | アンサータイトル | 問題の発生したバージョン | 修正バージョン |
|---|---|---|---|
| 68767 | SMPTE UHD-SDI Transmitter Subsystem - Vivado ツール 2017.3 以降のバージョンのリリース ノートおよび既知の問題 | N/A | N/A |
| 70291 | LogiCORE UHD-SDI GT - Vivado ツール 2017.3 バージョン以降のリリース ノートおよび既知の問題 | N/A | N/A |
| AR# 68766 | |
|---|---|
| 日付 | 07/05/2019 |
| ステータス | アクティブ |
| 種類 | リリース ノート |
| IP |
|