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AR# 6947

1.5isp2 xvkdr:42 signal clock (clk2x) is driving pin in of u4 (bufg)

説明

keywords: CLKDLL, xvkdr, 42

Urgency: Standard

When doing offchip synchronization using the CLKDLL multiple outputs can be used in the circuit. App Note 132 shows an example in Figure 11.

ソリューション

If multiple outputs from this clkdll need to be used multiple CLKDLL need to be instantiated as seen in the app note. Another output can be used though on the second clkdll.
AR# 6947
作成日 07/01/1999
最終更新日 04/10/2000
ステータス アーカイブ
タイプ 一般