We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 7524

XPLA Professional - Timing simulation gives different results than simulation with the *.vho or *.vo file.


Keywords: XPLA, Professional, CoolRunner, fitter, vho, vo, simulation, timing

Urgency: Standard

General Description:
Why does the timing simulation in XPLA Professional give different results
than simulation with the *.vho (or *.vo) file?


The VHO/VO files produced by XPLA Professional use "worst case" path
timing. This file does not distinguish signal paths through the PAL from
signal paths through the PLA. If an equation has more than 5 product terms
(4 for the XPLA2), the timing in the VHO file will show PLA timing
for all signal paths in the equation.

The timing simulator in XPLA Professional uses the actual path timing.
Therefore, if the signal path is through a product term in the PAL, the PAL
timing is used. If the signal path is through a product term in the PLA, the
PLA timing is used.

Therefore, differences can be seen in the two methods of timing
simulations. This can show up in path delays using product term clocks
as well. The XPLA Professional timing simulation uses circuit details and
is a more accurate representation of the actual, worst-case device timing.
AR# 7524
日付 05/28/2002
ステータス アーカイブ
種類 一般