General Description: Why does the simulator occasionally run for long periods of time?
ソリューション
The main reason for very long simulation times are often due to unknown or undefined states of internal nodes during the simulation. You must be careful using busses. The tri-state level of the bus can easily introduce undefined states into the network. This is the same problem you can get with the hardware. If you have tri-state inputs to logic, the outputs can start oscillating. The output will be undefined and the simulator will continuously calculate the new internal levels of the network. This results in very long simulation times and very large *.res files because every new state is written into the *.res file.
Under normal conditions, the simulator calculates until there is a stable network condition. After this it is just waiting for the next stimuli after a SU command in the *.scl file. The way to find out which signal is unstable, you can use the command LIST# to detect which signals are unstable at a certain position in the simulation. This can be after a BUSI or BUSO command in this file.
This condition may also be caused by video board color settings which is discussed at (Xilinx Solution 7507).