to UPGRADE YOUR BROWSER We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome,
Firefox,
Internet Explorer 11,
Safari. Thank you! XST does not preserve port names with a leading "_" (underscore) in Verilog, and issues the following warning: "WARNING:Xst:921 - "file", line xx: Renaming <_name> to <X_name>" To remain compliant with the various netlists formats associated with the implementation tools, XST adds an "X" at the beginning of a signal/port name that begins with an underscore ( _ ).AR# 8903
XST - "WARNING:Xst:921 - "file", line xx: Renaming <_name> to
説明
ソリューション
AR# 8903
日付
05/14/2014
ステータス
アーカイブ
種類
一般