After installing the 3.1i SP1 update, the following error may be seen when targeting 4000 / Spartan cores using the Xilinx Core Generator:
Sim has a problem implementing the selected core. Implementation netlist will not be generated. And the log file will contain errors such as:
Project options have been updated. ERROR: Error locating library for class com.xilinx.ip.ulprimitives.FDCE. ERROR: An internal error has occurred. To resolve this error, please consult the Answers Database at http://support.xilinx.com ERROR: Sim has a problem implementing the selected core. Implementation netlist will not be generated. ERROR: SimGenerator: Failure of Sim to implement customization parameters core modsinlu ERROR: Elaboration of core Sine-Cosine_Look-Up_Table failed.
This has been seen when the 3.1i Service Pack 1 has been applied, but the Coregen IP update has not yet been applied. Also, this may be seen if the Coregen update is applied prior to the 3.1i Service Pack 1.