UltraScale FPGA Post-Configuration Access of SPI Flash Memory using STARTUPE3 (XAPP1280)

Document ID: XAPP1280
Release Date: 2023-05-17
Revision: 2.1 English

UltraScale FPGA Post-Configuration Access of SPI Flash Memory using STARTUPE3 Application Note
Summary
Introduction
Document Organization
Recommended Design Experience
System Overview
Reference Design Files
IP Core Address Map
SPI Flash Memory Map
Running the Reference Design
Required Hardware and Software
Set Up Host Computer
Set Up KCU105 Board
Download Reference Design Files
Generate Reference Design Project
Generate Programming Files
Configure FPGA with golden.bin
Program SPI Flash Memory with update.bin
Configure FPGA with update.bin
Hardware System Details
Clock Topology
AXI Quad SPI Core and STARTUPE3 Primitive
Customizing the AXI Quad SPI Core
STARTUPE3 Primitive
STARTUPE3 Timing Constraints
SPI Configuration Mode Constraints
Software System Details
Flash Command Set
Checklist and Debug Tips
Conclusion
Reference Design
References
Revision History
Please Read: Important Legal Notices

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