Performance and Resource Utilization for CORDIC v6.0

Vivado Design Suite Release 2020.1

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Kintex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7k480t ffg901 -1 k7_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 396 890 895 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 336 3454 3437 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 292 7632 7599 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 303 308 230 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 260 624 422 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 472 1077 1057 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 380 3812 3762 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 265 863 669 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 424 3599 3626 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 249 668 531 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 188 2182 1328 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 336 3551 3614 0 0 0 PRODUCTION 1.12 2017-02-17

Kintex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku115 flva1517 -1 ku_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 500 910 895 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 396 3470 3437 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 352 7642 7598 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 358 303 231 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 319 623 422 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 533 1060 1058 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 456 3765 3764 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 341 866 678 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 494 3537 3627 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 336 704 530 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 238 2233 1342 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 435 3555 3616 0 0 0 PRODUCTION 1.26 12-04-2018

Kintex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku13p ffve900 -1 kup_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 719 902 897 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 647 3467 3444 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 533 7668 7614 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 549 317 230 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 467 624 421 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 844 1070 1058 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 741 3760 3774 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 467 869 668 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 746 3536 3628 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 494 706 530 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 352 2174 1340 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 647 3568 3621 0 0 0 PRODUCTION 1.28 02-27-2020

Virtex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7vx690t ffg1157 -1 v7_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 380 891 894 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 352 3447 3436 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 286 7623 7598 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 297 301 230 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 254 622 422 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 456 1078 1055 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 407 3827 3760 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 260 862 669 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 358 3555 3621 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 249 670 531 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 183 2177 1328 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 336 3543 3614 0 0 0 PRODUCTION 1.11 2014-09-11

Virtex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu160 flgb2104 -1 vu_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 500 909 897 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 440 3452 3437 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 391 7646 7598 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 374 306 231 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 325 636 422 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 511 1060 1057 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 467 3756 3761 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 314 865 668 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 472 3539 3625 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 336 705 534 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 238 2197 1334 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 450 3580 3614 0 0 0 PRODUCTION 1.27 12-04-2018

Virtex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu9p flgb2104 -1 vup_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 768 908 897 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 610 3472 3445 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 527 7664 7601 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 560 323 230 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 478 631 421 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 790 1065 1055 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 713 3775 3771 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 467 863 668 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 697 3540 3626 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 494 704 530 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 330 2226 1338 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 599 3557 3617 0 0 0 PRODUCTION 1.27 02-28-2020

Zynq UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xczu9eg ffvb1156 -1 zup_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 763 912 898 0 0 0 PRODUCTION 1.27 02-28-2020
xczu9eg ffvb1156 -1 zup_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 631 3463 3441 0 0 0 PRODUCTION 1.27 02-28-2020
xczu9eg ffvb1156 -1 zup_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 571 7701 7602 0 0 0 PRODUCTION 1.27 02-28-2020
xczu9eg ffvb1156 -1 zup_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 527 316 230 0 0 0 PRODUCTION 1.27 02-28-2020
xczu9eg ffvb1156 -1 zup_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 467 639 421 0 0 0 PRODUCTION 1.27 02-28-2020
xczu9eg ffvb1156 -1 zup_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 839 1065 1058 0 0 0 PRODUCTION 1.27 02-28-2020
xczu9eg ffvb1156 -1 zup_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 724 3765 3765 0 0 0 PRODUCTION 1.27 02-28-2020
xczu9eg ffvb1156 -1 zup_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 478 878 668 0 0 0 PRODUCTION 1.27 02-28-2020
xczu9eg ffvb1156 -1 zup_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 757 3544 3631 0 0 0 PRODUCTION 1.27 02-28-2020
xczu9eg ffvb1156 -1 zup_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 483 703 530 0 0 0 PRODUCTION 1.27 02-28-2020
xczu9eg ffvb1156 -1 zup_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 347 2281 1334 0 0 0 PRODUCTION 1.27 02-28-2020
xczu9eg ffvb1156 -1 zup_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 604 3579 3617 0 0 0 PRODUCTION 1.27 02-28-2020

COPYRIGHT

Copyright 2020 Xilinx, Inc. Xilinx, the Xilinx logo, Alveo, Artix, ISE, Kintex, Spartan, Versal, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. Arm is a registered trademark of Arm Limited in the EU and other countries. All other trademarks are the property of their respective owners.

LEGAL INFORMATION: PLEASE READ

The information disclosed to you hereunder (the "Materials") is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising under, or in connection with, the Materials (including your use of the Materials), including for any direct, indirect, special, incidental, or consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same. Xilinx assumes no obligation to correct any errors contained in the Materials or to notify you of updates to the Materials or to product specifications. You may not reproduce, modify, distribute, or publicly display the Materials without prior written consent. Certain products are subject to the terms and conditions of Xilinx's limited warranty, please refer to Xilinx's Terms of Sale which can be viewed at https://www.xilinx.com/legal.htm#tos; IP cores may be subject to warranty and support terms contained in a license issued to you by Xilinx. Xilinx products are not designed or intended to be fail-safe or for use in any application requiring fail-safe performance; you assume sole risk and liability for use of Xilinx products in such critical applications, please refer to Xilinx's Terms of Sale which can be viewed at https://www.xilinx.com/legal.htm#tos.