axi4stream_vif_proxy

AXI4STREAM VIF Proxy Class. It has virtual interface for AXI4STREAM VIP interface. Drivers of AXI4STREAM VIP drive transaction/ready onto AXI4STREAM VIP bus interface through APIs(such as  put_transaction) of this class, monitor of AXI4STREAM VIP collects AXI4STREAM interface information and convert it into transaction through APIs(get_transaction) in this class.

Functions
wait_aclks
virtual task wait_aclks(
input xil_axi4stream_uint cnt
);

Waits specified amount of posedge aclk occur

wait_posedge_aclk
virtual task wait_posedge_aclk();

Waits posedge of ACLK of m_vif

wait_posedge_aclk_with_hold
virtual task wait_posedge_aclk_with_hold();

Waits posedge of ACLK of m_vif and then wait hold_time

wait_negedge_aclk
virtual task wait_negedge_aclk();

Waits negedge of ACLK of m_vif

wait_areset_deassert
virtual task wait_areset_deassert();

Waits areset to be deasserted

get_drive_x
virtual function xil_axi4stream_boolean_t get_drive_x();

Returns 1 if dummy_drive_type is XIL_AXI4STREAM_VIF_DRIVE_X, else returns 0

cheap_random
virtual function void cheap_random();

Generate simplified randomization of xid,xdest and xlast of VIF when user define XIL_DO_NOT_USE_ADV_RANDOMIZATION

get_dummy_drive_type
virtual function xil_axi4stream_vif_dummy_drive_t get_dummy_drive_type();

Get Dummy Drive Type of m_vif

wait_valid_asserted(
virtual task wait_valid_asserted();

Waits TVALID of m_vif asserted

new
function new(
input string name"unnamed_axi4stream_vif_proxy"
);

Constructor to create a new axi4stream vif proxy,~name~ is the instance name.

run_phase
task run_phase();

Starts control processes for operation of

get_current_clk_count
function xil_axi4stream_ulong get_current_clk_count();

Returns clk_edge_counter

get_current_edge_time
function time get_current_edge_time();

Returns clk_edge_time

set_drive_x
virtual function void set_drive_x();

Sets Dummy Drive type to be XIL_AXI4STREAM_VIF_DRIVE_X

set_dummy_drive_type
virtual function void set_dummy_drive_type(
input xil_axi4stream_vif_dummy_drive_t inp
);

Sets Dummy Drive Type

assign_vi
function void assign_vi (
virtual interface axi4stream_vip_if `XIL_AXI4STREAM_PARAM_ORDER vif
) ;

Assigns m_vif

put_noise
virtual function void put_noise();

Puts noise on bus

reset
virtual function void reset();

Sets TVALID to be 0 and puts noise onto bus

put_transaction
virtual function void put_transaction(
input axi4stream_transaction trans
);

Puts transaction information onto bus

get_transaction
virtual function axi4stream_monitor_transaction get_transaction();

Collects m_vif information and returns it to axi4stream_transaction

set_valid
virtual function void set_valid();

Sets valid of m_vif to be 1

clr_valid
virtual function void clr_valid();

Sets valid of m_vif to be 0

set_ready
virtual function void set_ready();

Sets ready of m_vif to be 1

clr_ready
virtual function void clr_ready();

Sets ready of m_vif to be 0

is_live_valid_asserted
virtual function bit is_live_valid_asserted();

Returns 1 if TVALID of m_vif is 1, else returns 0

wait_live_valid_asserted
virtual task wait_live_valid_asserted();

Wait TVALID of m_vif is 1

is_ready_asserted
virtual function bit is_ready_asserted();

If HAS_TRAEADY is on, returns 1 if TREADY of clock block in m_vif is 1, else returns 0 If HAS_TRAEADY is off, returns 1.

is_valid_asserted
virtual function bit is_valid_asserted();

Returns 1 if TVALID of clock block in m_vif is 1, else returns 0

is_areset_asserted
virtual function bit is_areset_asserted();

Returns 1 if ARESET_N of clock block in m_vif is 0, else returns 0

wait_areset_asserted
virtual task wait_areset_asserted();

Waits negedge of ARSET_N of m_vif

wait_valid_sampled
virtual task wait_valid_sampled();

Waits till TVALID is sampled

wait_tx_accepted
virtual task wait_tx_accepted();

Waits till TREADY/TAVLID handshake occurs

is_tx_accepted
virtual function bit is_tx_accepted();

Returns 1 if TREADY/TVALID handshake occurs, otherwise returns 0