XUP has developed a basic functional IP blocks library which can be used to create digital designs in a schematic view. The tutorial and laboratory exercises are created and available for use with the XUP supported boards. The laboratory material is targeted for use in a introductory Digital Design course where professors want to include FPGA technology in the course to validate the learned principles through creating designs using Vivado.
The tutorial is developed to get the users (students) introduced to the digital design flow in Xilinx programmable devices using Vivado IP Integrator (IPI). The guide - How to create your own IPI block - guides you through the procedure of creating a custom IPI block and then use it in your next design.
|Basys3 Master XDC File||basys3_master.xdc|
|Basys3 Reference Manual||basys3_rm.pdf|
|Nexys4 Master XDC File||nexys4_master.xdc|
|Nexys4 Reference Manual||nexys4_rm.pdf|
|XUP LIB||Library Components List.pdf|