ERROR:Place:864 - Incompatible IOB's are locked to the same bank 13

Conflicting IO Standards are:

IO Standard 1: Name = LVDS_25, VREF = NR, VCCO = 2.50, TERM = NONE, DIR =

INPUT, DRIVE_STR = NR

List of locked IOB's:

clktestn

clktestp

IO Standard 2: Name = LVCMOS33, VREF = NR, VCCO = 3.30, TERM = NONE, DIR =

OUTPUT, DRIVE_STR = 12

List of locked IOB's:

dataout_test

These IO Standards are incompatible due to VCCO mismatch. This mismatch can

be caused by setting DIFF_TERM = TRUE for some IOs locked to the bank

Phase 2.7 Design Feasibility Check (Checksum:266480e0) REAL time: 40 secs

Total REAL time to Placer completion: 40 secs

Total CPU time to Placer completion: 39 secs

ERROR:Pack:1654 - The timing-driven placement phase encountered an error.