Vivado IP Release Notes
This article contains a list of all 'Vivado IP Release Notes - All IP Change Log Information' answer records and the associated Vivado™ Tools release.
作成者: AMD
AMD High-Speed Ethernet LogiCORE™ (HSEC) is a high-performance and flexible implementation of the IEEE 802.32012 for 40Gbps and 100Gbps Ethernet.
For new designs in UltraScale™ and UltraScale+™, refer to the 40G/50G Ethernet Subsystem.
For new designs in UltraScale and UltraScale+™, refer to the UltraScale+ Integrated 100G Ethernet Subsystem and UltraScale Integrated 100G Ethernet Subsystem.
AMD 40G/100G Ethernet LogiCORE™ based on Sarance Technologies Best-In-Class Intellectual Property
AMD High-Speed Ethernet LogiCORE (HSEC) is a high-performance and flexible implementation of the IEEE 802.32012 for 40Gbps and 100Gbps Ethernet. The HSEC implements the 40G and 100G aggregate Physical Coding Sublayer (PCS), and a 40G and 100G Media Access Controller (MAC) module. The HSEC is the world’s first implementation of the IEEE 802.32012 specifications and has been successfully deployed in a major ISP’s network in the USA. AMD also sells the CAUI and XLAUI PCS layers standalone with optional Auto_Negotiation and FEC for backplane applications. AMD 40G and 100G Ethernet LogiCORE is based on Sarance Technologies Intellectual Property and is delivered as a netlist implemented in UltraScale and Virtex™ FPGA families.
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.