Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
作成者: AMD
The Adder/Subtracter IP provides LUT and single DSP slice add/sub implementations.
The Adder/Subtracter IP provides LUT and single DSP slice add/sub implementations. The Adder/Subtracter module can implement adders (A+B), subtracters (A–B), and dynamically configurable adder/subtracters which operate on signed or unsigned data. The function can be implemented in a single DSP slice or LUTs. The module can be pipelined.
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