ISE Release Notes
This document contains a listing of release note tables, one for each IP core.
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ChipScope™ Pro IBERT for Virtex™ 5 FPGA GTX Transceivers
作成者: AMD
The ChipScope™ Pro Integrated Bit Error Ratio Tester (IBERT) core for Virtex™ 5 FPGA GTX transceivers is a customizable core that can be used to evaluate and monitor the health of the GTX transceivers.
- デザイン ツール サポート: ISE Design Suite
- バンドル内容: ISE Design Suite
- ライセンス: End User License Agreement
- デバイス サポート: Virtex 5