Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
作成者: AMD
The AMD DDR3 core can generate a full controller or phy only for custom controller needs.
The AMD DDR3 controller is high performance (2133 Mbps in UItraScale–) with support for lower power DDR3L as well as UDIMMs, SODIMMs, and RDIMMs.
The AMD DDR3 core can generate a full controller or phy only for custom controller needs. The Controller will run up to 2133 Mbps in UltraScale devices. The controller is configurable through the IP catalog. The controller will support data widths from 8b to 80b and multiple memory types including components, UDIMM, SODIMM, and RDIMMs. Comprehensive in system testing across PVT corners is done to ensure first time success. Additional debug capabilities are provided like the Advanced Traffic Generator which allows in system testing with PRBS or custom traffic patterns to isolate bit errors on the read or write side. A powerful simulation environment allows you to quickly calculate efficiency based on your traffic patterns. Simple tweaks to the controller settings can help tune and find the best efficiencies.
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.