Hardware Evaluation Time Out Period * : ~ 6 hrs
| LogiCORE™ | バージョン | AXI サポート | ソフトウェア サポート | サポートするデバイス ファミリ |
| CAN | v5.1 | AXI4-Lite | Vivado™ 2023.1 | Versal® Kintex™ UltraScale+™ Virtex™ UltraScale+ Zynq™ UltraScale+ Kintex UltraScale™ Virtex Zynq 7000 Artix™ 7 Kintex 7/-2L Virtex 7/-2L/XT |
| CAN | v4.2 | AXI4-Lite | ISE™ 14.4 |
Zynq 7000 Artix 7 Kintex 7/-2L Virtex 7/-2L/XT Virtex 6 XC CXT/LXT/SXT/HXT/-1L Spartan™ XC LX/LXT/-1L Spartan 6 XA LX/LXT |
| CAN | v4.2 | ISE 13.2 |
Virtex 6 XC Virtex 5 SXT/LXT Virtex 5 LX/ XA Spartan-6 XA Spartan 3A DSP XA XA Spartan 3A XA Spartan 3E XA Spartan 3 Spartan 3/3E Spartan 3A/3AN/3A DSP |
Download the required software from the AMD Downloads page. For information on New Features, Known Issues, and Patches please refer to the Licensing Solution Center.
* A Hardware Evaluation license for any of the IP cores above will enable you to parameterize, generate and instantiate these cores in your design. You will also be able to perform functional and timing simulation and generate a bitstream that you can use to download and configure your design in hardware.
The IP cores in this table will be fully functional in the programmed device for certain amount of time. After this time, the IP will "time out" (cease to function) and you will need to download and configure the FPGA again.