Partial Reconfiguration Decoupler IP
作成者: AMD
The Partial Reconfiguration (PR) Decoupler IP provides logical isolation capabilities for PR designs. One or more PR Decoupler cores can be used to make the interface between a Reconfigurable Partition (RP) and the static logic safe from unpredictable activity while partial reconfiguration is occurring.
- デザイン ツール サポート: Vivado Software
- バンドル内容: Vivado Software
- ライセンス: End User License Agreement
- デバイス サポート: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Zynq 7000, Zynq UltraScale+ MPSoC