製品説明
The MXIC Flash Host Controller is used to access Flash, including NOR and NAND Flash for high throughput and low pin count applications.
The controller operates in one of these modes: I/O Mode, Linear Addressing Mode (Mapping Mode) and DMA Mode.
In I/O Mode, software interacts closely with the flash device protocol. The software writes the flash commands and data to the controller using TXD Register. Software reads the RXD register that contains the data received from the flash device. This process is called as Buffer Read Write data transfer.
In Linear Addressing Mode, after accepting AXI Burst Read or Write Command, the controller emulates the software to send Read or Write instructions to the flash device.
Besides Buffer Read Write data transfer, the controller also supports DMA data transfer. A DMA master engine is included in the controller. The Host Controllers supports SDMA only. With AXI Slave interface, the Host Controller can also be a DMA Slave, which behaves like Linear Addressing Mode besides the flash instructions should be issued by software.
主な機能と利点
- Data Rate: SDR(S), DDR(D)
- Flexible I/O: Single Flash in 1-bit, 4-bit, 8-bit interface and Dual Flash in 1-bit, 4-bit, 8-bit stacked interface
- Programmable bus protocol: SPI, QSPI, OCTA and ONFI
- 32-bit AXI interface (Master) for DMA transfer
- 32-bit AXI interface (Slave) for Linear Addressing Mode transfer
- 32-bit AXI Lite interface (Slave) for I/O Mode transfer
