7 Series FPGAs Configurable Logic Block User Guide Updated with clarifications to the previous version.
Device Reliability Report, Second Quarter 2014 Updated with second quarter 2014 reliability test results.
AXI Chip2Chip Reference Design for Real-Time Video Applications Demonstrates real-time video traffic across two 7 series FPGA evaluation boards.
NEON を使用して Zynq-7000 AP SoC でのソフトウェア性能を向上 (日本語版) 文書の更新。日本語版リリース。
Zynq-7000 AP SoC, I2C - Standard Mode running faster than 90 kHz violates tHD; STA timing requirement New (or Updated) Design Advisory (or Advisories)
(Xilinx Answer 59366): "Zynq-7000 AP SoC, I2C - Standard Mode running faster than 90 kHz violates tHD; STA timing requirement"